IWLPC brings together the semiconductor industry’s most respected authorities to address all aspects of wafer-level, 3D device packaging, advanced manufacturing & test technologies.
Addressing wafer-level packaging, 3D, and Advanced Manufacturing & Test technologies, the International Wafer-Level Packaging Conference (IWLPC) has been at the forefront of packaging technology evolution.
The conference has a rich history of bringing together attendees from over 16 countries in the heart of Silicon Valley to immerse themselves in the latest technology and business trends. Going into its 14th year, the IWLPC is co-produced by Chip Scale Review, the leading international magazine addressing the semiconductor packaging industry, and SMTA, the distinguished global association representing electronic assembly and manufacturing professionals.
3D Integration Track
3D integration and interposer technology are now well accepted approaches for fabrication of high-performance memory-enhanced products, memory-on-logic stacks, and 3D IC products that are entering the market.
Along with the above developments, 3D integration is also recognized as a key technology for heterogeneous devices that demand smart system integration, rather than extreme high-interconnect densities. Heterogeneous integration technologies are being developed for functional diversification systems, including the integration of CMOS-based devices with others, such as analog/RF, solid-state lighting, HV power, passives, sensors / actuators, biochips and biomedical devices.
Since its inception, the IWLPC has been at the forefront of technology evolution in wafer-level packaging (WLP) by addressing the material, process, equipment, and reliability challenges associated with these products. Over the years, the IWLPC has showcased the tremendous advancements in dielectric materials, photolithography techniques, and plating processes that have enabled wafer-level packaging to become the fasted growing IC packaging technology in the industry.
About Chip Scale Review
Chip Scale Review is the preeminent global magazine leading the way in middle-end and back-end technologies for advanced semiconductors covering device & wafer-level test, assembly & packaging. For over 20 years Chip Scale Review has continued to showcase industry leaders with exclusive editorial content that includes in-depth technical articles by leading industry technologists, market forecasts and updates from veteran industry analysts, research institutions, industry news, events and reviews.
A non-profit international association of companies and individuals (totaling 4,000) involved in all aspects of advanced electronics assembly, surface mount and related technologies.
The association is dedicated to the advancement of the electronics industry through member education and interaction. Local chapters are based in the United States Canada, Mexico, Brazil, India, Israel, Malaysia, Taiwan, and China.
Why Exhibit at IWLPC?
* Reach a focused international audience
* Generate Exposure in this highly competitive marketplace
* Share New Products and concepts to the market
* Enhance Relationships with existing customers and generate new leads
What type of attendees will be there?
Assembly/Packaging Engineers, Corporate/General Management, Test Engineering, Engineering Management, IC Design Engineer, Manufacturing Management, PC Board Design/Fabrication, Purchasing, R&D, Sales / Marketing, Consultant, and many more!
➢ Reach a focused international audience
➢ Generate exposure in this highly competitive marketplace
➢ Share new products and concepts to the market
➢ Enhance relationships with existing customers and generate new leads
➢ Access to innovative knowledge at the conference sessions
➢ Opportunity to market your company as a supporter of the IWLPC!
Source : Event Website
|IWLPC - International Wafer-Level Packaging 2020 Conference||San Jose||California||800 e||70 e||Oct 13, 2020|
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